1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, particularly to a semiconductor device including a process forming dielectric film on an electrode consisting of material oxidized easily by high temperature process. Further, the present invention relates to a dielectric capacitor, particularly to improvement of ferroelectricity thereof.
2. Description of the Related Art
Ferroelectric memory (FeRAM) is a device having superior characteristics in non-volatile performance, constant electric power operation, high speed writing-in, high rewrite resistance, etc., and is attracted recent years.
A ferroelectric capacitor used for the ferroelectric memory is made by that a tungsten plug 3 is formed on an oxide silicon layer 2 formed on a silicon substrate 1 and that a lower electrode 5 consisting of platinum, a ferroelectric layer 6 consisting of PZT (PbZrxTi1-xO3) film, and an upper electrode 7 consisting of platinum are laminated as shown in FIG. 17.
Using platinum for the lower electrode 5 is caused by the following reason. A PZT film must be formed on an orientation film. This is because forming it on an amorphous film damages ferroelectric performance, as orientation performance is bad. On the other hand, the lower electrode 5 must be formed at state insulated from the silicon substrate 1. Because of that, an oxide silicon layer 2 is formed on the silicon substrate 1. The oxide silicon layer 2 is amorphous. Generally, although film formed on amorphous becomes non-orientation film, platinum has a characteristic becoming an orientation film even if formed on the amorphous film. By this reason, platinum is often used for the lower electrode.
However in the above-mentioned, conventional ferroelectric capacitor, there are the following problems.
There is a problem that ferroelectric performance decreases by escapement of oxygen in the ferroelectric (PZT), aging, and repeat of polarization inversion because oxygen easily permeates through platinum. That is, there is the possibility that oxygen in the ferroelectric escapes between columnar crystals of the platinum as shown in FIG. 18.
Further, the problem such as this appears not only in the ferroelectric memory but also similarly as in the capacitor using ferroelectric having high dielectric constant.
Further, although tantalum silicon nitride (TaSiN) is proposed for wiring barrier layer up to now, there is a problem that nitrogen generates upon oxidation and oxide film is formed by later heat treatment even in such wiring so as to decrease conductivity.
An object of the present invention is to provide a ferroelectric capacitor or ferroelectric capacitor having high dielectric constant which deteriorate less by aging and repeat of polarization inversion not only at manufacturing, by solving the above-mentioned problem, preventing oxidation of substrate material.
Another object of the present invention is to provide a semiconductor device having wiring high in reliability without increase of resistivity.
In the present invention, xe2x80x9ccapacitorxe2x80x9d indicates a structure providing electrodes at both sides of an insulator and includes any structure regardless of being used for storing electric charge or not.
The first aspect of the present invention is characterized by including an electrode formed on surface of a semiconductor substrate, wherein said electrode includes a barrier layer consisting of amorphous or microcrystal expressed by the following expression: M1xM21-x (0 less than x  less than 1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Further, said surface of semiconductor substrate is constructed by at least one kind of polysilicon, tungsten, cobalt, molybdenum, copper, these silicide, and alloy.
Another aspect of the present invention is characterized by comprising: a lower electrode formed on a semiconductor substrate; a dielectric layer formed on said lower electrode and constructed by ferroelectric or dielectric having high dielectric constant; and an upper electrode formed on said dielectric layer, wherein said lower electrode includes a barrier layer consisting of amorphous or microcrystal expressed by the following: M1xM21-x (0 less than x less than 1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, C; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Another aspect of the present invention is characterized by having: a lower electrode formed on a semiconductor substrate; a dielectric layer formed on said lower electrode and constructed by ferroelectric or dielectric having high dielectric constant; and an upper electrode formed on said dielectric layer, wherein said electrode includes a barrier layer consisting of amorphous or microcrystal between said dielectric layer and said upper electrode expressed by the following expression: M1xM21-x (0 less than x less than 1M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Another aspect of the present invention is characterized by including an electrode formed on surface of a semiconductor substrate, wherein said electrode is constructed by amorphous or microcrystal single layer expressed by the following expression: M1xM21-x (0 less than x less than 1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Another aspect of the present invention is characterized by including process forming an electrode formed on surface of a semiconductor substrate and process forming a dielectric film on the upper layer thereof, wherein process forming said electrode includes process forming a barrier layer consisting of amorphous or microcrystal expressed by the following expression: M1xM21-x (0 less than x less than 1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Another aspect of the present invention is characterized by including: process forming a lower electrode on surface of a semiconductor substrate; process forming a dielectric layer consisting of ferroelectric or dielectric having high dielectric constant on said lower electrode; and process forming an upper electrode on said dielectric layer, wherein said process forming the lower electrode includes process forming amorphous or microcrystal expressed by the following expression so as to form a dielectric capacitor: M1xM21-x (0 less than x less than 1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
Another aspect of the present invention is characterized by including: process forming a lower electrode on a semiconductor substrate; process forming a dielectric layer consisting of ferroelectric or dielectric having high dielectric constant on said lower electrode; process forming a barrier layer consisting of amorphous or microcrystal expressed by the following expression on said dielectric layer: M1xM21-x (0 less than x less than 1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb); and process forming an upper electrode on said barrier layer so as to form a dielectric capacitor.
Another aspect of the present invention is characterized by including an electrode formed on surface of a semiconductor substrate, wherein said electrode is constructed by amorphous or microcrystal single layer expressed by the following expression: M1xM21-x (0 less than x less than 1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
A semiconductor device of the present invention includes a barrier layer consisting of amorphous or microcrystal between an electrode and a dielectric layer expressed by the following expression: M1xM21-x (0 less than x less than 1; M1: Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V, Cr; M2: Ta, Ti, Zr, Hf, W, Y, Mo, Nb).
According to such the structure, barrier effect is large so as to prevent mutual diffusion of oxygen etc. and spike because the barrier layer consisting of the amorphous or microcrystal does not have clear grain boundary. Such the compound can keep the state of amorphous or microcrystal without crystallization at forming film temperature of dielectric layer. Therefore, escape of oxygen from dielectric layer can be prevented so as to depress aging of dielectric characteristic. Dielectric thin film formed on the amorphous or microcrystal is good in orientation performance so as to be possible to provide dielectric structure high in reliability.
When surface of the electrode is material oxidized at crystallization temperature of dielectric layer, there is a problem that resistivity is increased by oxidation of the electrode surface in the case that the barrier layer of the present invention does not exist. However, according to the present invention, escapement of oxygen from the dielectric layer can be surely prevent so as to depress aging of dielectric characteristic. According to fore-mentioned aspects, ferroelectric layer may consist of a PZT. In the PZT, thermal treatment of 700xc2x0 C., 1 to 60 minutes after painting is necessary for forming film by Sol-Gel method. According to spattering method, substrate temperature or thermal treatment temperature becomes about 700xc2x0 C. According to MOCVD method, substrate temperature becomes about 600 to 650xc2x0 C. However, according to such the method, barrier layer of the present invention keeps amorphous or microcrystal state even when substrate temperature becomes about 700xc2x0 C. Said barrier layer is stable and makes it possible to suppress increase of resistivity without generation of gas.
Although barrier layer of the present invention is amorphous or microcrystal, dielectric layer good in crystal orientation performance can be formed when dielectric layer is formed on the upper layer.
Therefore, a dielectric capacitor good in ferroelectric performance and high dielectric performance can be provided.
Even by the method of the present invention, escapement of oxygen from the dielectric layer is surely prevented by existence of the barrier similarly, and aging of dielectric characteristic can be depressed not only at forming film.
Especially, crystallization temperature of IrTa is more than 900xc2x0 C., and there are generation of gas at oxidation and decrease of conductivity. Further, amorphous or microcrystal state is kept, and thin film forming good in orientation performance to the upper layer becomes possible when dielectric film is formed on the upper layer.
A semiconductor device of the present invention is characterized by that having an electrode formed on a surface of a semiconductor substrate, wherein said electrode includes an amorpous or microrcrystal barrier layer which includes at least an element chosen from a first group of Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V and Cr and at least an element chosen from a second group of Ta, Ti, Zr, Hf, W, Y, Mo and Nb. A barrier effect is kept good with a ternary chemical compound or higher is used as a barrier layer. Matching grating constant becomes easier, making it possible to form an electrode with an excellent boundary characteristics.
The present invention is effective not only in the case of dielectric capacitor but in the case with heating process in oxidation atmosphere after forming wiring layer.
The followings are applicable for the barrier layer M1xM21-x used in the present invention:
Au0.4 Fe0.6, Au0.35 Ti0.65, Au0.35 Zr0.65, Co0.40 Hf0.60, Co0.5 Mo0.5, Co0.5 Ta0.5, . . . CoTi, CoW, CoY, CoZr, CrTi, CrTi, CuHf, CuTa, CuZr, FeMo, FeTi, FeW, FeY, FeZr, HfNi, HfV, IrNb, IrTa, MoNi, MoRe, MoRu, MpZr, NbNi, NbPd, NbRh, NiTa, NiTI, NiW, NiY, NiZr, OsTa, OsW, PdTi, PtW, PtZr, ReTa, ReW, RhZr, RuW, RuZr, VZr, and WZr.
Further, other than the above listed binary chemical compounds, a barrier layer of either amorphous or microcrystal of ternary chemical compounds or higher composed of at least an element from a first group of Au, Pt, Ir, Pd, Os, Re, Rh, Ru, Cu, Co, Fe, Ni, V and Cr and at least an element from a second group of Ta, Ti, Zr, Hf, W, Y, Mo and Nb, such as IrTiPt for example, is applicable.
The composition ratio is changeable suitably, and it is possible to raise grid consistency between the substrate and the upper layer film by varying the composition ratio continuously. It is possible to obtain material near to objective value in function while raising grid consistency by varying the composition ratio continuously.
Because crystallization temperature changes greatly even by slight change of the composition ratio, suitable attention is required. In other words, it is possible to raise grid consistency and to provide a crystal thin film high in reliability while obtaining necessary characteristic.
Here, microcrystal is about 10 nm in crystal grain diameter or less, and grain boundary is not penetrated all over thickness of film.